Texas Instruments PCI2050B PCI-to-PCI Bridge
Texas Instruments PCI2050B PCI-to-PCI Bridge features a high-performance connection path between two peripheral component interconnect (PCI) buses operating at a maximum bus frequency of 66MHz. Transactions occur between masters on one and targets on another PCI bus. The PCI2050B bridge allows bridged transactions to occur concurrently on both buses. The PCI-to-PCI Bridge supports burst mode transfers to maximize data throughput, and the two bus traffic paths through the bridge act independently.
The TI PCI2050B bridge is compliant with the PCI Local Bus Specification and is used to overcome the electrical loading limits of 10 devices per PCI bus and one PCI device per extension slot by creating hierarchical buses. The PCI2050B delivers two-tier internal arbitration for up to nine secondary bus masters and may be implemented with an external bus arbiter.
The CompactPCI™ hot-swap extended PCI capability makes the PCI2050B bridge an ideal solution for multifunction compact PCI cards and adapting single function cards to hot-swap compliance.
Features
- Two 32-bit, 66MHz PCI buses
- 3.3V core logic with universal PCI interfaces compatible with 3.3V and 5V PCI signaling environments
- Internal two-tier arbitration for up to nine secondary bus masters and supports an external secondary bus arbiter
- Ten secondary PCI clock outputs
- Independent read and write buffers for each direction
- Burst data transfer with pipeline architecture to maximize data throughput in both directions
- Supports write combing for enhanced data throughput
- Supports the frame-to-frame delay of only four PCI clocks from one bus to another
- Up to three delayed transactions in both directions
- Bus locking propagation
- Predictable latency per PCI local bus specification
- Architecture configurable for PCI bus power management interface specification
- CompactPCI hot-swap functionality
- Secondary bus is driven low during reset
- VGA/palette memory and I/O decoding options
- Advanced submicron, low-power CMOS technology
- 208-terminal PDV, 208-terminal PPM, or 257-terminal MicroStar BGA™ package
Block Diagram
Publicado: 2021-02-03
| Actualizado: 2022-03-11