Diodes Incorporated PI6CG33A06 6-Output PCIe® Clock Generator
Diodes Inc. PI6CG33A06 6-Output PCI Express® (PCIe®) 5.0/6.0/7.0 Clock Generator is an ultra-low jitter clock generator designed to meet the demands of PCIe 7.0 specification while maintaining compliance with all previous generations of the PCIe specification. The 40-pin, 5mm x 5mm VQFN (ZLF) packaged PI6CG33A06 generates precise 25MHz and 100MHz reference clocks and achieves RMS jitter of less than 30fs (femtoseconds). This ultra-low jitter provides greater design margins, helping engineers manage signal integrity challenges across complex PCB traces and connectors. The device targets servers, networking equipment, high-performance computing (HPC) systems, and data center platforms that underpin next-generation AI infrastructure.
The Diodes Inc. clock generator provides a stable reference clock for 128.0GT/s PCIe links, meeting the bandwidth demands of 800G and 1.6T networking and advanced AI accelerators. Accurate timing at these speeds is critical to maintaining performance and reliability in data center systems. The PI6CG33A06 also implements proprietary low-power, high-speed current-steering logic (LP-HCSL) technology with integrated termination. This technology reduces clock-related power consumption by at least 50% compared to traditional HCSL solutions and lowers the thermal footprint in high-density AI server racks. The high level of integration eliminates the need for up to 24 external resistors, reducing BOM cost, simplifying PCB layout, and freeing board space for cooling or additional compute and memory resources.
Each of the six outputs includes an individual output enable (OE) pin, enabling more effective power management and greater flexibility in controlling system operation. Designed for use in existing server clock architectures, the device supports Intel CK440Q-Lite specifications. This enables designers to reuse proven system designs while improving timing performance and overall system margin.
Features
- Meets PCIe 5.0/6.0/7.0 clock requirements
- Supports Intel's CK440Q specifications
- 3.3V supply voltage
- 25MHz crystal or an input from a XO/TCXO/OCXO for meeting customer-specific PPM requirements
- 6x differential clock output pairs at 1.4V differential into a PCI Express (PCIe) compliant test load
- 3x dedicated 100MHz outputs
- 1x dedicated 25MHz outputs
- 2x selectable outputs capable of driving 25M or 100MHz
- 85Ω differential drivers
- Programmable SSC on the 100MHz
- SMBus programmable configurations with multiple SMBus addresses
- 1x tri-level address selection
- PCIe compatible OE# control on 3-pins, and 3-wire shift/load control on all outputs
- <30fs PCIe 7.0 common clock (RMS) jitter
- 40-pin, 5mm × 5mm VQFN (ZLF) package
- Totally lead-free and fully RoHS-compliant
- Halogen-/antimony-free, Green device
Applications
- Data centers and servers
- AI infrastructure and accelerator systems
- Networking equipment
- High‑Performance Computing (HPC) systems
- PCIe clock distribution architectures
Specifications
- 3.135V to 3.465V operating power supply voltage range
- Maximum power supply current ranges
- 1mA to 39mA normal operating mode
- 1mA to 9mA 25MPG mode
- 1mA to 6mA power down mode
- 120KΩ typical internal pull-up/-down resistance
- 7nH maximum pin inductance
- 25MHz typical crystal frequency
- 50Ω maximum crystal equivalent series resistance
- 8pF typical crystal load capacitance
- 7pF maximum crystal shunt capacitance
- 200µW maximum crystal drive level
- -40°C to +85°C ambient temperature range
- +125°C maximum junction temperature
- 2000V Human Body Model (HBM) ESD protection
Resources
Typical Application
Block Diagram
